The invention relates to a method for manufacturing a semiconductor device, more particularly, to a method for manufacturing a semiconductor device free from layer-lifting between insulating layers.
With rapid advances in technology of semiconductor devices toward a reduced design rule and finer patterns, certain manufacturing processes requires depositing different kinds of insulating layers.
To enable control of etching or polishing by means of etching or etching stop, a silicon nitride (Si3N4) layer is often deposited as an etching (or polishing) stop layer on a silicon oxide (SiO2) layer. In this regard, when such different kinds of layers are deposited, interlayer defects such as layer-lifting may occur due to different characteristics between the layers. The layer-lifting between the layers can cause cracks between the layers.
In the case where a silicon rich oxynitride (SRON) layer is formed as a hard mask on the silicon oxide layer to realize an etching selection ratio or a polishing selection ratio, layer lifting of the silicon nitride layer may occur more frequently when the silicon nitride layer is deposited on the silicon nitride layer from which the SRON layer used as the hard mask is removed.
The cracks may be generally exposed to a contact hole penetrating the insulating layers. Hence, when a contact layer, for example, a metal layer, is deposited into the contact hole to fill the contact hole, the cracks cause a bridge phenomenon between contacts, lines or elements since the metal layer is deposited in the cracks exposed to the contact hole.
FIGS. 1 and 2 are schematic cross-sectional views showing the bridge phenomenon caused by the layer-lifting in a conventional semiconductor device.
Referring to FIGS. 1 and 2, as the design rule of the semiconductor device, for example, DRAM, is reduced, a capacitor 40 is preferably embodied in a three-dimensional structure such as a cylindrical capacitor on a first insulating layer 10 which comprises a silicon oxide layer.
Here, before deposition of a storage electrode 41, a dielectric film 43, and a plate electrode 45 for implementation of this three-dimensional capacitor 40, a storage electrode contact 11 is formed through the first insulating layer 10 to electrically connect the capacitor 40 to a semiconductor substrate (not shown) below the capacitor 40 or to a transistor (not shown). To form a contact hole for the storage electrode contact 11, an SRON hard mask (not shown) is preferably formed on the first insulating layer 10.
After the storage electrode contact 11 is formed, a silicon nitride layer 20 is formed as an etching stop layer on the first insulating layer 10 from which the hard mask is removed. Then, in order to embody the storage electrode 41 in a cylindrical shape, a second insulating layer 30 to act as an insulating mold on the silicon nitride layer 20 is formed to have an opening hole 31 therethrough, and comprises a silicon oxide layer. Here, it can be understood that the silicon nitride layer 20 is formed as the etching stop layer when etching the opening hole 31.
As such, after forming the capacitor 40, a third insulating layer 50 is formed to cover the capacitor 40, and a contact hole 51 is formed to penetrate the third insulating layer 50. Then, as shown in FIG. 2, line layers 60 such as M1, for example, a barrier metal layer 61 and a line metal layer 63, are formed to fill the contact hole 51. In this regard, it can be understood that the line layers 60 are formed together with a metal contact 65, such as M1C, which fills the contact hole 51.
Meanwhile, on an interface between the silicon nitride layer 20 and the silicon oxide layer of the first insulating layer 10, layer-lifting of the silicon nitride layer 20 can occur due to differences in bonding characteristics between the different kinds of insulating materials. Furthermore, when the SRON hard mask is provided, the interlayer characteristics between the first insulating layer 10 and the silicon nitride layer 20 deteriorate, causing more significant layer-lifting. In addition, since the silicon nitride layer 20 is formed by low pressure plasma deposition of silicon nitride generally causing higher tensile stress in a furnace, the layer-lifting of the silicon nitride layer 20 can be further activated due to the tensile stress.
Cracks 21 can be created in the interface due to the layer-lifting, and act as a path connecting the two line layers 60 or two metal contacts 65, which line layers and metal contacts must be independent of each other. As a result, when the barrier metal layer 61 is deposited in the contact hole, it can be undesirably deposited on the cracks 21, so that a bridge 23 can be formed to electrically connect the metal contacts 65.
As such, the layer-lifting causes the bridge 23, in particular, between the metal contacts 65 in a surrounding region rather than a cell region, which results in electrical short circuit of the components of the device.
There are needs of a method which can prevent the layer-lifting on the interface between the insulating layers to secure reliability in operation of the device.